VeTSS PhD School and Sixth Workshop on Formal Methods and Tools for Security (FMATS)

Venue: Microsoft Research Cambridge (map)
Dates: 24-25 September 2018

Organisers: Philippa Gardner (Imperial), Cedric Fournet and Antoine Delignat-Lavaud (MSR Cambridge).

To register, please complete this short online booking form.


The purpose of this joint meeting is to bring together verification, systems and security experts interested in formal analysis, industrialists interested in software validation, and government scientists interested in reliable software systems, and to introduce them to the current generation of UK PhD students and postdocs. International speakers include:

Anindya Banerjee (NSF, USA), Program manager for the “Formal Methods in the Field” NSF call Karthik Bhargavan (Inria, France), Expert in formal analysis of large security-critical applications Gernot Heiser (Data61, Australia), Originator of the sel4 verified microkernel
Suresh Jagannathan (Purdue, USA), Leader of three DARPA projects focussed on formal methods Stephen Magill (Invariance/Galois, USA), Expert in static and dynamic program analysis


Details of the programme are being finalised and will be announced shortly. FMATS traditionally attracts a wide audience, including UK academic researchers, PhD Students, industrialists and government employees. The two-day workshop comprises invited talks addressing key research topics from the field of formal methods and their application to security, with the aim of fostering discussion between all participants.

The speaker list is in preparation. So far, the following people have agreed to speak: Gernot Heiser, (Data61, Australia), Stephen Magill (Invariance/Galois, USA), Suresh Jagannathan (Purdue, USA) and Anindya Banerjee, (NSF, USA) . In addition, there will be short talks by researchers leading projects funded  in the recent VeTSS call for research proposals.

One important aim is to foster dialogue between the PhD students, RAs and industry.  The transition from either PhD student or RA to industry is known to be difficult, with each individual essentially making it up as they go along. One hope is that, through FMATS and VeTSS, it will be possible to build up a level of understanding of the opportunities out there in for analysis and verification enthusiasts in the industrial sector.

Suggestions are welcome on how to make this work. There will be short talks for PhD students, RAs and industrialists to introduce themselves to each other and the audience.  In addition, there will be a panel of young PhD students, RAs and industrialists informing us about their experience.


To register, please complete this short online booking form.

There is no charge for the workshop. Complimentary tea/coffee, lunches and a workshop dinner at a nearby College will be provided. Participants are expected to make their own travel and accommodation arrangements. Dinner places will be allocated on a first-come first-served basis.

Poster Session

To provide with a further opportunity for PhD student and RAs to network and discuss their research we will also hold a poster session. Please indicate during registration if you plan to bring a poster.

Travel Grants

PhD students may apply for a travel grant, see the Travel grants page.